DDC-I announced an enhanced integration between the Deos safety-critical RTOS and LDRA’s automated software verification, source code analysis, and unit testing tools for aerospace and defense applications.
The integrated solution enables avionic system manufacturers to quickly and cost-effectively develop, debug, test and deploy software that can be readily verified to the most demanding guidance of DO-178C/ED-12C Design Assurance Level (DAL A).
With the completion of this integration, the latest LDRA tool suite now supports the latest version of DDC-I’s Deos safety-critical real-time operating system (RTOS) with its SafeMC multicore technology.
The LDRA tool suite provides enhancements for source code static analysis, software dynamic analysis (including MC/DC coverage on the host and target), and software unit testing on the host and target.
Together, these enhancements improve code quality, safety and security, as well as reduce testing time and cost. They also help developers manage and achieve compliance for increasingly complex safety-critical cockpit applications that utilize emerging technologies like modular avionics and multicore processors to build safer, more economical, more capable aircraft.
“The integration of Deos with the LDRA tool suite gives avionics developers the platform they need for rapid prototyping, testing, certification and deployment of modular, reusable, safety-critical applications that comply with DO-178C and FACE,” said Greg Rose, vice president of marketing and product management at DDC-I. “The updated Deos and LDRA integration should prove especially attractive to developers who want to utilize the latest multicore technology while addressing worst-case execution requirements as defined in the FAA’s CAST-32A position paper for Multi-core Processors.”
“Proving the avionics system is properly partitioned to avoid interference from competing cores is critical, yet it’s a nearly impossible challenge without the proper development and testing tools,” said Ian Hennell, operations director, LDRA. “Using the LDRA/DDC-I integration, developers can ensure the software is safe and meets the most demanding avionics standards such as DO-178C and the Future Airborne Capability Environment (FACE) Technical Standard.”
To facilitate the development and testing of software that conforms with safety-critical standards such as DO-178C/ED-12C, and portability and interoperability standards such as the FACE Technical Standard, the integrated Deos/LDRA integration provides:
• Full source-code coverage analysis (under Deos SafeMC).
• An efficient unit testing harness for fully automated unit and regression testing (also under Deos with SafeMC).
• The ability to analyze and visualize coding standards compliance within the OpenArbor IDE.
• Support for x86, PowerPC, and ARM single and multicore processors.
• Compliance with industry- and user-defined coding standards such as MISRA and CERT.
• Automated test case, harness and stub generation for robustness testing with the LDRA tool suite.
• Automatic production of software certification and approval evidence underpinned by LDRA’s ISO 9001:2015 certified Quality Management System, and the LDRA tool suite’s TÜV SÜD and SGS-TÜV Saar certification.
Deos is a safety-critical embedded RTOS that employs patented cache partitioning, memory pools, and safe scheduling to deliver higher CPU utilization than any other certifiable safety-critical COTS RTOS on multicore processors. First certified to DO-178 DAL A in 1998, Deos provides a FACE Conformant Safety Base Profile that features hard real-time response, time and space partitioning, and both ARINC-653 and POSIX interfaces.
SafeMC technology extends Deos’ advanced capabilities to multiple cores, enabling developers of safety-critical systems to achieve best in class multicore performance without compromising safety-critical task response and guaranteed execution time. SafeMC employs a bound multiprocessing (BMP) extension of the symmetric multiprocessing architecture (SMP), safe scheduling, and cache partitioning to minimize cross-core contention and interference patterns that affect the performance, safety criticality and certifiability of multi-core systems. These features enable avionics systems developers to address issues that could impact the safety, performance and integrity of a software airborne system executing on multicore processors (MCP), as specified by the Certification Authorities Software Team (CAST) in its Position Paper CAST-32A for multicore processors.
